Re: SSTC idea - DRSSTC ?

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "jimmy hynes by way of Terry Fritz <teslalist-at-qwest-dot-net>" <chunkyboy86-at-yahoo-dot-com>


Hi Jan,

I think it's a semantics problem. By 'duty cycle' I meant that I'm only 
bursting for a small portion of the time. Within each individual (60khz) 
cycle, the waveform is nearly symmetrical.

I didnt mean that the duty cycle  had anything to do with the time it took 
to reach steady state, I just meant that the burst would be almost over by 
the time the capacitor charged up with a single ended drive. The secondary 
wouldn't see "much" difference, since the dc bias is much smaller than a 
single ended drive. With single ended drive, I get hot clamps and a small 
negative bias (with really dead IGBTs if the clamps fall off, the gates 
could see over 100 volts.)

The gate drive output seems pretty symmetrical, and the gate drivers have a 
few ohms in them kill DC currents between bursts. I haven't seen any 
evidence of saturated cores.

The uC runs at 3.3volts. If I pop another one I'll add the buffer :-)

  Tesla list <tesla-at-pupman-dot-com> wrote:
Original poster: "Jan Wagner by way of Terry Fritz "

Hi,

On Mon, 31 Mar 2003, Tesla list wrote:
 > Original poster: "jimmy hynes by way of Terry Fritz
"
 >
 > Hello Jan,
 >
 > Thanks for the comments, I've been thinking along the same lines.
 >
 > Earlier, I tried using one driver chip per transformer with a capacitor do
 > remove the DC bias but since I use such a small duty cycle the capacitor
 > doesn't reach steady state for a while, and this causes problems.

At first start-up, the steady state should be reached quite fast,
regardless of duty cycle. Takes probably 2..4 cycles in total. IIRC
this doesn't even show on the output, if you use a dual ended drive of the
primary.

Only really fast, large changes in the duty! cycle cause a prob (t.ex., 90%
duty changes to 10% on the next pulse). If you run with a fixed or vrey
small duty cycle then this should be no problem.

But the voltage shift on the output, esp. at really extreme duty cycles,
is a larger trouble. This requires that you use DC restoration to get
small or wide pulsewidth signals to the gate "properly". And _that_
requires some time for the output pulses to shift upwards and reach steady
state. So the prob is on the secondary side, not the primary.


 > I decided
 > to just drive the transformer with an H bridge. I no longer think the
 > little "extra" pulse is needed to prevent saturation, because I'm only
 > driving a it for a few cycles.

If you do this, you could still add a small resistor in series with the
primary. Around 1 Ohm, for example.

This is because unless your drive pulses are absolutely symmetrical, the
mag flux density of the core will start ! shifting into some direction, and
the core might still saturate at some later time (or not, if the pulses
are turned off early enough).


 > On the other hand, it's just a few lines of
 > code, and they are already in there. I left off the output resistors to get
 > a quick rise on the gates. The secondary ringing is taken care of by the
 > clamps (until they fall off).

LOL! Ok that works too of course... :-)


 > My gate drive transformers are pretty specialized. They each have 4
 > outputs, and a turn ratio of 1:2.5 or so to hit the gates hard while
 > staying within the driver voltage limit.

Yeah, that's some special turns ratio.


 > Winding the transformer was easy
 > because I didn't twist the wires. I left the clamps off the output of the
 > gate driver chips. It doesn't seem to be a problem now, but they could have
 > saved some driver chips by sacrificing themselves (The tim! e the gate 
driver
 > chips blew up).

Btw, the Coilcraft drive xfmrs don't seem to have wires twisted either. I
didn't take one apart (too valuable ;-), but from the outside it looks
like it's just four winding layers, like: pri - sec 1 - sec 2 - pri


 > Originally, I was going to use opto-isolators between the microprocessor
 > and the gate drivers, but they ended up causing more problems than they
 > fixed. I cant remember the exact problem but it had to do with needing an
 > extra supply level. I did try some resistors between the microprocessor and
 > the gate driver chips, but I took them out. When I started switching the
 > gate drivers really fast to 'actively' kill the ringing (at almost 1Mhz)
 > their input capacitance required higher signal current. I could probably
 > just use more resistance on the primary side, but my resistor assortmant
 > ran out (Radio Shack is almost a mile away, and I hate! resistors). I
 > probably should put something in, I don't think I am done killing
 > microprocessors, and they are the most expensive component at $10.

You're running 3.3V on the uC?

Then you could just put in a open-drain or open-collector buffer chip
used for logic level conversion. Like 74C907 or 54C907, or MC74VHC1GT125
(www.onsemi-dot-com, free samples)

Alternatively, just use a simple buffer chip (like 74HC04, works at 3.3V
too, though I'd not be suprised if Radio Shack didn't carry even
these...). Buffer input via "protection" resistor to the uC, outputs
directly to the driver chips input pins.

TC442x series take, IIRC, 2.0V to mean input logic HIGH.


 > Today I finally got to the point where I've checked everything and I'm
 > ready to crank up the power. It works with a full wave rectifier and filter
 > caps with no resistors to limit current. It does pull about 60ma with no
 > load, I hope! that's ok.

Ok, I hope it works!
Good luck!!

cheers,

--
*************************************************
high voltage at http://www.hut.fi/~jwagner/tesla
Jan OH2GHR



Jimmy



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