Re: SSTC, Modes and soft switching

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Antonio Carlos M. de Queiroz" <acmdq-at-uol-dot-com.br> 

Tesla list wrote:
 >
 > Original poster: "Steve Conner" <steve.conner-at-optosci-dot-com>

 > I guess the corollary of this is, that if you force soft switching, the
 > output waveform must grow without limit :) I have observed this in
 > simulations and experiments. And it makes sense in theory too- if the
 > inverter voltage is held in phase with the primary current, then real power
 > must be leaving the inverter at all times- the flow can't reverse.

Certainly. Only losses can limit the output voltage (and the input
current) in this case. Equivalent to excite a fixed system at one
of its resonances.

 > I set the PLL up so its unlocked frequency is equal to the resonant
 > frequency of the primary alone. So it is practically in lock to start with.
 > I found experimentally that this setting gave the cleanest switching
 > overall. As the burst progresses I can see the frequency fall until it
 > reaches the lower split frequency. This is accompanied by a slight phase
 > error since the PLL needs an error signal to perform a frequency change.
 >
 > Because of the loose coupling and small tank capacitance I have been using
 > bursts of around 50 cycles to get enough bang energy. I'm going to try
 > tighter coupled coils next and will report on how it goes.

Ok. Why not to use a simple comparator sensing the sign of the input
current? Noise, I imagine?

 > The problem then is how to deliver a large amount of energy in such a short
 > time- it leads to immense peak currents in the transistors. The DRSSTCs
 > built so far use 10 to 30 cycles and peak currents of 200 to 1500A.

I don't have yet current comparisons for the several possible modes.
In the capacitor discharge system, the 1:2:3 mode is the one that
requires the smallest maximum input current for a given output energy.
I would not be surprised by something similar in the forced response
system, but didn't verify yet.

Antonio Carlos M. de Queiroz